The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2013

Filed:

Sep. 15, 2011
Applicants:

Eugene Rogers Atwood, Poughkeepsie, NY (US);

Thomas Joseph Bardsley, Hopewell Junction, NY (US);

Victor Moy, Hopewell Junction, NY (US);

Michael Won, Hopewell Junction, NY (US);

Inventors:

Eugene Rogers Atwood, Poughkeepsie, NY (US);

Thomas Joseph Bardsley, Hopewell Junction, NY (US);

Victor Moy, Hopewell Junction, NY (US);

Michael Won, Hopewell Junction, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/173 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Embodiments of the present invention provide an inequality indication system (IIS). The IIS provides built in test support which enables evaluation, in an on-chip digital logic circuit, of digital values as inequalities, with either a single pass/fail bit expressed on a device I/O or a readable register containing inequality evaluation results. The IIS enables the movement of value evaluation onto the device (chip) using a common simple method, well suited to address/data type structures or scan based structures, instead of off-chip, which then requires tester dependent custom code. The IIS, when enabled, overrides the TDO signal to allow it to function as an inequality indicator instead of a standard test data out signal.


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