The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2013

Filed:

Apr. 11, 2012
Applicants:

Sang-jine Park, Yongin-si, KR;

Bo-un Yoon, Seoul, KR;

Jeong-nam Han, Seoul, KR;

Yoon-hae Kim, Yongin-si, KR;

Doo-sung Yun, Suwon-si, KR;

Inventors:

Sang-Jine Park, Yongin-si, KR;

Bo-Un Yoon, Seoul, KR;

Jeong-Nam Han, Seoul, KR;

Yoon-Hae Kim, Yongin-si, KR;

Doo-Sung Yun, Suwon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a method for fabricating a semiconductor device, a semiconductor device is provided including an interlayer dielectric film and first and second hard mask patterns sequentially stacked thereon. A first trench is provided in the interlayer dielectric film through the second hard mask pattern and the first hard mask pattern. A filler material is provided on the interlayer dielectric film and the first and second hard mask patterns to fill the first trench. First and second hard mask trimming patterns are formed by trimming sidewalls of the first and second hard mask patterns and removing the filler material to expose the first trench. A damascene wire is formed by filling the first trench with a conductive material.


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