The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2013

Filed:

Jul. 11, 2011
Applicants:

Imsoo Park, Seongnam-si, KR;

Young-hoo Kim, Seongnam-si, KR;

Changki Hong, Seongnam-si, KR;

Jaedong Lee, Seongnam-si, KR;

Daehong Eom, Hwaseong-si, KR;

Sung-jun Kim, Hwaseong-si, KR;

Inventors:

Imsoo Park, Seongnam-si, KR;

Young-Hoo Kim, Seongnam-si, KR;

Changki Hong, Seongnam-si, KR;

Jaedong Lee, Seongnam-si, KR;

Daehong Eom, Hwaseong-si, KR;

Sung-Jun Kim, Hwaseong-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a nonvolatile memory device having a three-dimensional memory device includes alternately stacking a plurality of first and second material layers having a different etching selectivity on a semiconductor substrate; forming an opening penetrating the plurality of first and second material layers; removing the first material layers exposed by the opening to form extended portions extending in a direction perpendicular to the semiconductor substrate from the opening; conformally forming a charge storage layer along a surface of the opening and the extended portions; and removing the charge storage layer formed on sidewalls of the second material layers to locally form the charge storage layer patterns in the extended portions.


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