The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 26, 2013
Filed:
Jun. 29, 2007
Xiaomin Yang, Sewickley, PA (US);
Shuaigang Xiao, Cranberry Township, PA (US);
XiaoMin Yang, Sewickley, PA (US);
Shuaigang Xiao, Cranberry Township, PA (US);
Seagate Technology LLC, Cupertino, CA (US);
Abstract
A lithography process for manufacturing bit-island storage mediums that results in improved resolution and uniformity between bit-islands. The lithography process includes applying a resist coating polymer to a surface of a substrate. Selected areas of the resist coating polymer are then exposed to an energy source, wherein each selected area is exposed to the energy source multiple times to provide a time-averaged exposure of the selected areas that reduces errors caused by noise associated with the energy source. After exposure of the resist coating to the energy source, a selective developer solution is applied to the resist coating to develop the fully exposed regions of the resist coating while leaving undeveloped the partially exposed regions of the resist coating. A polymer reflow material is applied to the developed resist pattern and heated to a selected temperature. The polymer reflow material and selected temperature induce reflow of the developed resist coating such that such that a circumferential diameter associated with the holes formed in the resist pattern is reduced to a desired value distance. The process of inducing reflow of the resist coating can be repeated as desired to achieve a resist pattern wherein the holes formed in the resist pattern are reduced to a desired size. The resist pattern formed on the substrate is then transferred to a magnetic medium to form the desired pattern of bit-islands.