The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 19, 2013

Filed:

Feb. 24, 2011
Applicants:

Motoyuki Tanisho, Kawasaki, JP;

Toshiyasu Sakata, Kawasaki, JP;

Yoshitaka Nishio, Kawasaki, JP;

Ikuo Ohtsuka, Kawasaki, JP;

Kazunori Kumagai, Kawasaki, JP;

Inventors:

Motoyuki Tanisho, Kawasaki, JP;

Toshiyasu Sakata, Kawasaki, JP;

Yoshitaka Nishio, Kawasaki, JP;

Ikuo Ohtsuka, Kawasaki, JP;

Kazunori Kumagai, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A computer-readable, non-transitory medium stores therein a design support program that causes a computer executing tentative wiring processing between a first terminal group and a second terminal group in a tentative wiring area to execute a process. The process includes detecting unwired nets occurring in the tentative wiring area consequent to the tentative wiring processing; updating the tentative wiring area by expanding the tentative wiring area according to the number of unwired nets, if any unwired nets are detected at the detecting; controlling to execute the tentative wiring processing and the subsequent detecting with respect to the tentative wiring area updated at the updating; and determining the tentative wiring area to be a wiring area if no unwired nets are detected at the detecting.


Find Patent Forward Citations

Tanisho, Motoyuki. (2013). Support computer product, apparatus and method for wiring of integrated circuit design (U.S. Patent No. 8402414). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8402414

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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