The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 19, 2013
Filed:
Dec. 28, 2011
Babette Van Antwerpen, Mountain View, CA (US);
Michael D. Hutton, Mountain View, CA (US);
Gregg Baeckler, San Jose, CA (US);
Richard Yuan, Cupertino, CA (US);
Babette van Antwerpen, Mountain View, CA (US);
Michael D. Hutton, Mountain View, CA (US);
Gregg Baeckler, San Jose, CA (US);
Richard Yuan, Cupertino, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
An electronic automation system performs register retiming on a logic design, which may be a logic design for a programmable logic integrated circuit. Register retiming is a moving or rearranging of registers across combinatorial logic in a design in order to improve a maximum operating frequency or fmax. In one implementation, the system includes machine-readable code, which may be stored on a computer-readable medium such as a disk, executing on a computer. The system balances timing in order to trade off delays between critical and noncritical paths. Register retiming may make changes to a design at a gate level.