The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 19, 2013
Filed:
Dec. 28, 2010
Moises Cases, Austin, TX (US);
Bhyrav M. Mutnury, Austin, TX (US);
Nanju NA, Essex Junction, VT (US);
Terence Rodrigues, Austin, TX (US);
Moises Cases, Austin, TX (US);
Bhyrav M. Mutnury, Austin, TX (US);
Nanju Na, Essex Junction, VT (US);
Terence Rodrigues, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Methods, apparatuses, and computer program products are disclosed for controlling plating stub reflections in a chip package. In one embodiment, a resonance optimizer determines performance characteristics of a bond wire that connects a chip to a substrate of a semiconductor chip mount. In this embodiment, the resonance optimizer selects, based on the performance characteristics of the bond wire, a line width for an open-ended plating stub that extends from a signal interconnect of the substrate to a periphery of the substrate, The resonance optimizer also generates a design of signal traces for the substrate, where the signal traces include the open-ended plating stub with the selected line width.