Semiconductor integrated circuit having an on-chip pll and operating method thereof

Abstract

An on-chip phase-locked loop circuit has reduced power consumption in a semiconductor integrated circuit. The phase locked loop circuit is equipped with a phase frequency comparator, a loop attenuator, a charge pump, a loop filter, a voltage controlled oscillator and a divider. The attenuator includes a sampling circuit and a counter. A sampling pulse and first and second output signals both outputted from the phase frequency comparator are supplied to the sampling circuit. The sampling circuit outputs a sampling output signal. When the counter completes a countup of a predetermined number of sampling pulses outputted from the sampling circuit, the counter outputs a countup completion output signal. The charge pump outputs a charging current or a discharging current to the loop filter in response to the countup completion output signal.