The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 19, 2013
Filed:
Apr. 22, 2008
Jeroen Snelten, Eindhoven, NL;
Jeroen Snelten, Eindhoven, NL;
Koninklijke Philips Electronics N.V., Eindhoven, NL;
Abstract
A self-oscillating switch circuit is configured for use in a switching DC-DC converter (switched mode power supply (SMPS)). The self-oscillating switch circuit comprises an input terminal (Tin, Tin) for receiving power from a power supply () and an output terminal (Tont, Tont) for supplying power to a load. The load may be a high-power LED, for example. The self-oscillating switch circuit further comprises a power switch semi-> conductor device (Q) having a control terminal and a control semi-conductor device (Q) coupled to the power switch semi-conductor device. The power switch semi-conductor device is configured for controlling a load current between the input terminal and the output terminal and the control semi-conductor device is configured for supplying a control signal to the control terminal of the power switch semi-conductor device for controlling switching of the power switch semi-conductor device. In order to reduce a power loss in the power switch semi-conductor device, a gain semi-conductor device (Q) is coupled between the power switch semi-conductor device and the control semi-conductor device for amplifying the control signal. Due to the amplification of the control signal, switching of the power switch semi-conductor device is performed faster, thereby reducing power dissipation due to a load current flowing through the power switch semi-conductor device, while the base-emitter voltage of the power switch transistor is below a base emitter voltage corresponding to the peak current at that time.