The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8399915 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 19, 2013

Filed:

Apr. 28, 2008
Applicant:

Masaru Takaishi, Kyoto, JP;

Inventor:

Masaru Takaishi, Kyoto, JP;

Assignee:

Rohm Co., Ltd., Kyoto, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a semiconductor device which can reduce on-resistance by improving hole mobility of a channel region. A trench gate type MOSFET (semiconductor device) is provided with a p-type silicon substrate whose crystal plane of a main surface is a (110) plane; an epitaxial layer formed on the silicon substrate; a trench, which is formed on the epitaxial layer and includes a side wall parallel to the thickness direction (Z direction) of the silicon substrate; a gate electrode formed inside the trench through a gate dielectric film; an n-type channel region formed along the side wall of the trench; and a p-type source region and a p-type drain region which are formed to sandwich the channel region in the thickness direction (Z direction) of the silicon substrate. The trench is formed to have the crystal plane of the side wall as a (110) plane.


Find Patent Forward Citations

Takaishi, Masaru. (2013). Semiconductor device (U.S. Patent No. 8399915). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8399915

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