The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 12, 2013

Filed:

May. 21, 2010
Applicants:

Sergey Shumarayev, Los Altos Hills, CA (US);

Edwin Yew Fatt Kok, Penang, MY;

Lip Kai Soh, Perak, MY;

Chee Hong Aw, Selangor, MY;

Tee Wee Tan, Penang, MY;

Inventors:

Sergey Shumarayev, Los Altos Hills, CA (US);

Edwin Yew Fatt Kok, Penang, MY;

Lip Kai Soh, Perak, MY;

Chee Hong Aw, Selangor, MY;

Tee Wee Tan, Penang, MY;

Assignee:

Altera Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/04 (2006.01); G06F 13/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit includes physical media attachment ('PMA') circuitry that includes two different kinds of transceiver channels for serial data signals. One kind of transceiver channel is adapted for transceiving relatively low-speed serial data signals. The other kind of transceiver channel is adapted for transceiving relatively high-speed serial data signals. A high-speed channel is alternatively usable as phase-locked loop ('PLL') circuitry for providing a clock signal for use by other high- and/or low-speed channels. A low-speed channel can alternatively get a clock signal from separate low-speed PLL circuitry.


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