The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 12, 2013
Filed:
Nov. 04, 2011
Masato Maede, Kyoto, JP;
Masato Maede, Kyoto, JP;
Panasonic Corporation, Osaka, JP;
Abstract
An output transistor bias generation circuit which applies a bias voltage to one of two NMOS transistors constituting an output circuit having a stack structure, includes diode-connected NMOS transistors provided between an external connection pad connected to an external signal line having a voltage higher than a power supply voltage of an LSI circuit, and the gate of an NMOS transistor, diode-connected NMOS transistors provided between the gate of the NMOS transistor and a ground line, a diode-connected NMOS transistor provided between the power supply line and the gate of the NMOS transistor, and a capacitor-connected NMOS transistor provided between the gate of the NMOS transistor and the ground line.