The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 12, 2013
Filed:
Apr. 07, 2009
Mark Alfred Hadley, Newark, CA (US);
James Harold Atherton, Morgan Hill, CA (US);
Jay Tu, Pleasanton, CA (US);
Edward John Boling, Fremont, CA (US);
John Stephen Smith, San Jose, CA (US);
Mark Alfred Hadley, Newark, CA (US);
James Harold Atherton, Morgan Hill, CA (US);
Jay Tu, Pleasanton, CA (US);
Edward John Boling, Fremont, CA (US);
John Stephen Smith, San Jose, CA (US);
Alien Technology Corporation, Morgan Hill, CA (US);
Abstract
Methods and apparatuses for selecting a subset of RFID tags are provided in some embodiments. These methods and apparatuses utilize the susceptibility to light by persistent nodes found in passive tags. Light can be used to intentionally reduce persistence times in a particular subset tags or even an individual tag. Then, persistent nodes can be used as a selection criterion to distinguish previously illuminated tags from non-illuminated tags. In other embodiments, a power circuit receives a RF input source and generates a direct current (DC) output voltage. The circuit includes a bias circuit to supply a gate to source bias, which is independent of the DC output voltage. The circuit further includes a voltage multiplier circuit that is coupled to the bias circuit. The voltage multiplier circuit has MOS transistors with one transistor to receive the gate to source bias.