The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 12, 2013
Filed:
Oct. 05, 2011
Qui Vi Nguyen, San Jose, CA (US);
Takuya Ariki, Naka-ku, JP;
Jongmin Park, Cupertino, CA (US);
SanDisk Technologies Inc., Plano, TX (US);
Abstract
A level shifter circuit is presented that can apply a negative voltage level to non-selected blocks while still being able to drive a high positive level when selected. An exemplary embodiment presents a negative level shifter that is not susceptible to low voltage pfet breakdown. This allows for a high voltage level shifter (transfer gate) that can drive a negative level for unselected blocks and, when enabled for a selected block, can still drive a positive high voltage level. By using a pair of low voltage PMOS device whose n-wells share the same level as other PMOS transistors in the design, layout area can be minimized. The gates of this pair of PMOSs are connected to VSS, thereby preventing these low voltage PMOS devices from thin oxide breakdown.