The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 2013
Filed:
Mar. 06, 2009
Applicant:
Feng Shi, Irvine, CA (US);
Inventor:
Feng Shi, Irvine, CA (US);
Assignee:
Skyworks Solutions, Inc., Woburn, MA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method of generating a hazard-free representation of a logic circuit that can leverage the powerful and mature synchronous-circuit CAD synthesis tools. In a representative embodiment of the method, an initial representation of a specified asynchronous logic circuit is synthesized using one of such CAD tools. The initial representation is then analyzed to identify hazardous transitions and modified, e.g., by iteratively inserting additional logic aimed at preventing the identified hazardous transitions from producing glitches, until a hazard-free representation of the specified asynchronous logic circuit is produced.