The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2013

Filed:

Nov. 26, 2008
Applicants:

Lars Nyland, Carrboro, NC (US);

John R. Nickolls, Los Altos, CA (US);

Gentaro Hirota, Sunnyvale, CA (US);

Tanmoy Mandal, San Jose, CA (US);

Inventors:

Lars Nyland, Carrboro, NC (US);

John R. Nickolls, Los Altos, CA (US);

Gentaro Hirota, Sunnyvale, CA (US);

Tanmoy Mandal, San Jose, CA (US);

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01); G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

One embodiment of the present invention sets forth a technique for efficiently and flexibly performing coalesced memory accesses for a thread group. For each read application request that services a thread group, the core interface generates one pending request table (PRT) entry and one or more memory access requests. The core interface determines the number of memory access requests and the size of each memory access request based on the spread of the memory access addresses in the application request. Each memory access request specifies the particular threads that the memory access request services. The PRT entry tracks the number of pending memory access requests. As the memory interface completes each memory access request, the core interface uses information in the memory access request and the corresponding PRT entry to route the returned data. When all the memory access requests associated with a particular PRT entry are complete, the core interface satisfies the corresponding application request and frees the PRT entry.


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