The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8392659 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 05, 2013

Filed:

Nov. 05, 2009
Applicants:

Vaijayanthimala K. Anand, Austin, TX (US);

Diane Garza Flemming, Pflugerville, TX (US);

William A. Maron, Austin, TX (US);

Mysore Sathyanarayana Srinivas, Austin, TX (US);

Inventors:

Vaijayanthimala K. Anand, Austin, TX (US);

Diane Garza Flemming, Pflugerville, TX (US);

William A. Maron, Austin, TX (US);

Mysore Sathyanarayana Srinivas, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method, programmed medium and system are provided for enabling a core's cache capacity to be increased by using the caches of the disabled or non-enabled cores on the same chip. Caches of disabled or non-enabled cores on a chip are made accessible to store cachelines for those chip cores that have been enabled, thereby extending cache capacity of enabled cores.


Find Patent Forward Citations

Anand, Vaijayanthimala. (2013). Extending cache capacity on multiple-core processor systems (U.S. Patent No. 8392659). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8392659

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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