The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 2013
Filed:
Sep. 28, 2009
Arvind Chandrasekaran, San Diego, CA (US);
Jonghae Kim, San Diego, CA (US);
Arvind Chandrasekaran, San Diego, CA (US);
Jonghae Kim, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
An electronic system includes a system board and a packaging substrate mounted on the system board. One or more semiconductor dies are mounted on the packaging substrate and coupled to the system board. The system also includes one or more semiconductor die-based packaging interconnects between the system board and the packaging substrate. The semiconductor die-based packaging interconnect has a first face coupled to the system board and a second face coupled to the packaging substrate. Through silicon vias located in the semiconductor die-based packaging interconnect enable communication between the system board and the one or more semiconductor dies. The semiconductor die-based packaging interconnects may include passive devices, active devices, and/or circuitry. For example, the semiconductor die-based packaging interconnect may provide impedance matching, decoupling capacitance, and/or amplifiers for minimizing insertion loss.