The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 2013
Filed:
Apr. 28, 2011
Luca Ciccarelli, Rimini, IT;
Roberto Canegallo, Rimini, IT;
Claudio Mucci, Bologna, IT;
Massimiliano Innocenti, Urbino, IT;
Valentina Nardone, Avezzano, IT;
Luca Ciccarelli, Rimini, IT;
Roberto Canegallo, Rimini, IT;
Claudio Mucci, Bologna, IT;
Massimiliano Innocenti, Urbino, IT;
Valentina Nardone, Avezzano, IT;
STMicroelectronics S.R.L., Agrate Brianza (MB), IT;
Abstract
A circuit base cell is for implementing an engineering change order (ECO) obtained on a semiconductor substrate. The base cell may include a PMOS transistor having a first active region obtained in a first diffusion P+ layer implanted in an N-well provided for on the substrate, and an NMOS transistor having a second active region obtained in a second diffusion N+ layer implanted on the substrate in such a manner as to be electrically insulated from the first diffusion P+ layer. The cell may be characterized in that the active regions and the diffusion layers are aligned therebetween with respect to a reference axis and they are extended symmetrically in the direction orthogonal to the axis. A first and a second width may be associated with the active regions and to the diffusion layers, respectively. The first and second width may be greater than a width of the cell, which is equivalent to a pitch of the standard minimum cell.