The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 2013
Filed:
Feb. 19, 2010
Shogo Nakaya, Tokyo, JP;
Shogo Nakaya, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
Provided is a reconfigurable logic circuit that can effectively use a preposition logic that composes a logic block. The reconfigurable logic block according to the present invention includes a plurality of logic blocks () having a full adder (), two preposition logics () that perform a plurality of logic operations according to configuration data, an extended logic block () that can perform the logic operation of one or more kinds. Outputs (A andB) of the preposition logic are respectively connected to two argument inputs (A and B) of the full adder (). A carry output (CO) of the full adder () is connected to the extended logic block (). One selected from a plurality of signals including a fixed logic value is input to a carry input (CI) of the full adder according to the configuration data, and the extended logic block of other logic block generates an output signal according to an output of the extended logic block.