The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 05, 2013
Filed:
Mar. 06, 2009
Hiroki Nakahama, Osaka, JP;
Hiroki Nakahama, Osaka, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
Provided is a wiring board wherein a circuit is not short-circuited when a IC chip is mounted on the wiring board. A wiring board () is provided with a substrate (); wiring layers (-), which are formed on a surface of the substrate () and have prescribed wiring patterns; connecting terminals (-), which are formed on a part of the wiring layers (-) and electrically connected with bumps (-) of an integrated circuit chip (IC chip) (); a mounting region (), which is arranged on the surface of the substrate () and has the integrated circuit chip () mounted therein; and an insulating layer (), which is formed on the surface of the substrate () so as to surround the circumference of the mounting region () for protecting wiring layers (-). A part of the insulating layer () is arranged inside the mounting region (), and the thickness of the insulating layer () is more than that of the bumps (-) of the integrated circuit chip ().