The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2013

Filed:

Aug. 20, 2010
Applicants:

Nathan P. Lower, North Liberty, IA (US);

Mark M. Mulbrook, Marion, IA (US);

Robert L. Palandech, Marion, IA (US);

Inventors:

Nathan P. Lower, North Liberty, IA (US);

Mark M. Mulbrook, Marion, IA (US);

Robert L. Palandech, Marion, IA (US);

Assignee:

Rockwell Collins, Inc., Cedar Rapids, IA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/119 (2006.01); H01L 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention is a method for producing a capacitor. The method includes applying a dielectric substance (ex.—silicon nitride) to a first gold seed layer, the first gold seed layer being formed on a wafer. A second gold seed layer is formed upon the dielectric substance and first gold seed layer. Gold is electroplated into a photoresist to form a first set of 3-D capacitor elements on the second gold seed layer. A first copper layer is electroplated onto the second gold seed layer. Gold is electroplated into a photoresist to form a second set of 3-D capacitor elements, the second set of 3-D elements being formed at least partially within the first copper layer and being connected to the first set of 3-D elements. A second copper layer is electroplated onto the first copper layer. Then, both copper layers are removed to provide (ex.—form) the capacitor.


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