The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 05, 2013

Filed:

Dec. 02, 2008
Applicants:

Torsten Kramer, Wannweil, DE;

Matthias Boehringer, Reutlingen, DE;

Stefan Pinter, Reutlingen, DE;

Hubert Benzel, Pliezhausen, DE;

Matthias Illing, Kusterdingen, DE;

Frieder Haag, Wannweil, DE;

Simon Armbruster, Wannweil, DE;

Inventors:

Torsten Kramer, Wannweil, DE;

Matthias Boehringer, Reutlingen, DE;

Stefan Pinter, Reutlingen, DE;

Hubert Benzel, Pliezhausen, DE;

Matthias Illing, Kusterdingen, DE;

Frieder Haag, Wannweil, DE;

Simon Armbruster, Wannweil, DE;

Assignee:

Robert Bosch GmbH, Stuttgart, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for manufacturing chips (), in which at least one diaphragm () is produced in the surface layer of a semiconductor substrate () spanning a cavity (). The functionality of the chip () is then integrated into the diaphragm (). In order to separate the chip (), the diaphragm () is detached from the substrate composite. The method according to the present invention is characterized by metal plating of the back of the chip () in an electroplating process before the chip is separated.


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