The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2013

Filed:

Dec. 23, 2009
Applicants:

Xinghua Yang, San Jose, CA (US);

Paul N. Freeman, Saratoga, CA (US);

Huan-shang Tsai, Cupertino, CA (US);

Alan C. Nilsson, Mountain View, CA (US);

Jeffrey S. Bostak, San Martin, CA (US);

Vincent G. Dominic, Dayton, OH (US);

Parmijit Samra, Fremont, CA (US);

James Stewart, San Mateo, CA (US);

Inventors:

Xinghua Yang, San Jose, CA (US);

Paul N. Freeman, Saratoga, CA (US);

Huan-Shang Tsai, Cupertino, CA (US);

Alan C. Nilsson, Mountain View, CA (US);

Jeffrey S. Bostak, San Martin, CA (US);

Vincent G. Dominic, Dayton, OH (US);

Parmijit Samra, Fremont, CA (US);

James Stewart, San Mateo, CA (US);

Assignee:

Infinera Corporation, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 14/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

Consistent with the present disclosure, clock-and-data recovery (CDR) circuitry and driver circuitry are provided on a chip that is separate from the driver circuitry, thereby reducing the amount of power consumed by the driver circuitry and simplifying system design. In one example, timing of the ERZ signals is controlled by a feedback loop that adjusts the phase of a data carrying signal relative to a clock signal, such that the phase has a desired value. Timing of the ERZ signals may thus be adjusted to minimize errors.


Find Patent Forward Citations

Loading…