The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 26, 2013

Filed:

Aug. 23, 2006
Applicants:

Hiroyuki Toshima, Wako, JP;

Natsuo Nakamura, Wako, JP;

Inventors:

Hiroyuki Toshima, Wako, JP;

Natsuo Nakamura, Wako, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/04 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor integrated circuit device () which has a layered structure is composed of a plurality of semiconductor layers (L, L, L) in which an integrated circuit is formed on a substrate. Each of the semiconductor layers (L, L, L) has a semiconductor integrated circuit portion () that includes the abovementioned integrated circuit on a substrate (). Each of the semiconductor layers (L, L, L) also has on a substrate at least one unit of through-wiring () for electrically connecting the integrated circuit included in the semiconductor integrated circuit portion () to an integrated circuit of another semiconductor layer, and a surrounding insulation portion () for surrounding and insulating the through-wiring from the semiconductor integrated circuit portion. A structure formed by the surrounding insulation portion () and the through-wiring portion () composed of a plurality of units of through-wiring () reduces the resistance of the through-wiring portion and increases the degree of integration of a circuit.


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