The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 19, 2013

Filed:

Dec. 02, 2010
Applicants:

David J. Toops, Terrell, TX (US);

Sudhir K. Madan, Richardson, TX (US);

Suresh Balasubramanian, Richardson, TX (US);

Inventors:

David J. Toops, Terrell, TX (US);

Sudhir K. Madan, Richardson, TX (US);

Suresh Balasubramanian, Richardson, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A static RAM redundancy memory for use in combination with a non-volatile memory array, such as ferroelectric RAM (FRAM), in which the power consumption of the SRAM redundancy memory is reduced. Each word of the redundancy memory includes data bit cells for storing addresses of memory cells in the FRAM array to be replaced by redundant elements, and also enable bits indicating whether redundancy is enabled for those addresses. A logical combination of the enable bits in a given word determines whether the data bit cells in that word are powered-up. As a result, the power consumption of the redundancy memory is reduced to the extent that redundancy is not enabled for segments of the FRAM array.


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