The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 19, 2013
Filed:
Jul. 21, 2011
Akira Tojo, Kanagawa-ken, JP;
Tomoyuki Kitani, Kanagawa-ken, JP;
Kazuhito Higuchi, Kanagawa-ken, JP;
Masako Fukumitsu, Kanagawa-ken, JP;
Tomohiro Iguchi, Kanagawa-ken, JP;
Hideo Nishiuchi, Kanagawa-ken, JP;
Kyoto Kato, Kanagawa-ken, JP;
Akira Tojo, Kanagawa-ken, JP;
Tomoyuki Kitani, Kanagawa-ken, JP;
Kazuhito Higuchi, Kanagawa-ken, JP;
Masako Fukumitsu, Kanagawa-ken, JP;
Tomohiro Iguchi, Kanagawa-ken, JP;
Hideo Nishiuchi, Kanagawa-ken, JP;
Kyoto Kato, Kanagawa-ken, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
According to an aspect of the present invention, there is provided a semiconductor device, including a semiconductor chip including a first electrode and a second electrode of a semiconductor element, the first electrode and the second electrode being configured on a first surface and a second surface of the semiconductor chip, an encapsulating material encapsulating the semiconductor chip, the surface portion being other than regions, each of the regions connecting with the first second electrodes, each of inner electrodes being connected with the first or the second electrodes, a thickness of the inner electrode from the first surface or the second surface being the same thickness as the encapsulating material from the first surface or the second surface, respectively, outer electrodes, each of the outer electrodes being formed on the encapsulating material and connected with the inner electrode, a width of the outer electrode being at least wider than a width of the semiconductor chip, and outer plating materials, each of the outer plating materials covering five surfaces of the outer electrode other than one surface of the outer electrode being connected with the inner electrode.