The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 12, 2013

Filed:

Oct. 26, 2010
Applicants:

Carlos Eduardo Restrepo, Atlanta, GA (US);

Kallikuppa Muniyappa Sreenivasa, Karnataka, IN;

Kantesh Vittal Agnihotri, Karnataka, IN;

Manishkumar Natwarlal Shah, Karnataka, IN;

Srikanth Soma, Karnataka, IN;

Inventors:

Carlos Eduardo Restrepo, Atlanta, GA (US);

Kallikuppa Muniyappa Sreenivasa, Karnataka, IN;

Kantesh Vittal Agnihotri, Karnataka, IN;

Manishkumar Natwarlal Shah, Karnataka, IN;

Srikanth Soma, Karnataka, IN;

Assignee:

Cooper Technologies Company, Houston, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G08B 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Load current from an electrical AC supply circuit is monitored so that both high frequency (10-100 kHz), and low frequency (60 Hz) signal current components are measured over certain time periods. A high frequency energy component is measured in an integral fashion, e.g., summing a plurality of samples taken. A certain amount of high frequency energy during a half-cycle is required to indicate an arc event. A certain number of these arc events per half-cycle must occur within a specific time period to indicate the presence of an arc. The root-mean-square (RMS) value of the low frequency energy component is used to determine the severity of the arc. The higher the amperage of the load current arc, the faster the arc fault circuit interrupter (AFCI) will respond by disconnecting the arcing load from the AC supply circuit, e.g., fewer number of arc events necessary for tripping of the AFCI.


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