The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 12, 2013
Filed:
Dec. 12, 2011
Applicant:
I-chang Wu, Fremont, CA (US);
Inventor:
I-chang Wu, Fremont, CA (US);
Assignee:
Mediatek Inc., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract
A phase locked loop circuit and method for use, in accordance with an embodiment, implements a digital phase delay quantizer to replace the analog charge-pump and phase frequency detector in an analog PLL circuit. Therefore, the built-in loop filter can be a compact-sized, high order, high bandwidth, and high attenuation digital filter as well. The digital PLL circuit takes advantage of the deep sub-micron process technology which features high speed, high resolution, compact size, and low power.
Quick Actions:
Wu, I-chang. (2013). Method using digital phase-locked loop circuit including a phase delay quantizer (U.S. Patent No. 8373467). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8373467
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile