Memory management in a non-volatile solid state memory device

Abstract

A computer-implemented method of managing a memory of a non-volatile solid state memory device by balancing write/erase cycles among blocks to level block usage. The method includes: monitoring an occurrence of an error during a read operation in a memory unit of the device, wherein the error is correctable by error-correcting code; and programming the memory unit according to the monitored occurrence of the error; wherein the step of monitoring the occurrence of an error is carried out for at least one block; and wherein said step of programming comprises wear-leveling the monitored block according the error monitored for the monitored block. A computer system and a computer program-product is also provided. The non-volatile solid state memory device includes: a memory unit having data stored therein; and a controller with a logic for programming the memory unit according to a monitored occurrence of an error during a read operation. The method includes: monitoring an occurrence of an error during a read operation in a memory unit of the device; and programming the memory unit according to the monitored occurrence of the error.