The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2013

Filed:

Feb. 11, 2008
Applicants:

Tobias Gemmeke, Santa Clara, CA (US);

Nicolas Maeding, Holzgerlingen, DE;

Jochen Preiss, Boeblingen, DE;

Inventors:

Tobias Gemmeke, Santa Clara, CA (US);

Nicolas Maeding, Holzgerlingen, DE;

Jochen Preiss, Boeblingen, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for operand width reduction is described, wherein two N-bit input operands (A, B) of a bit width of N are processed and two M-bit output operands (A', B′) of a reduced bit width of M are generated in a way, that a post-processing comprising an M-bit adder function followed by saturation to M bits performed on said two M-bit output operands (A′, B′) provides an M-bit result equal to an M-bit result of an N-bit modulo adder function of the two N-bit input operands (A, B), followed by a saturation to M bits. Further an electronic computing circuit () is described performing said method. Additionally a computer system comprising such an electronic computing circuit is described.


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