The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 05, 2013

Filed:

May. 19, 2011
Applicants:

Louis Luh, Sunnyvale, CA (US);

Keh-chung Wang, Thousand Oaks, CA (US);

Wah S. Wong, Montebello, CA (US);

Miroslav Micovic, Thousand Oaks, CA (US);

David Chow, Newbury Park, CA (US);

Don Hitko, Grover Beach, CA (US);

Inventors:

Louis Luh, Sunnyvale, CA (US);

Keh-Chung Wang, Thousand Oaks, CA (US);

Wah S. Wong, Montebello, CA (US);

Miroslav Micovic, Thousand Oaks, CA (US);

David Chow, Newbury Park, CA (US);

Don Hitko, Grover Beach, CA (US);

Assignee:

HRL Laboratories, LLC, Malibu, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
Abstract

A process for fabricating an integrated group III nitride structure comprising high electron mobility transistors (HEMTs) and Schottky diodes, and the resulting structure, are disclosed. Integration of vertical junction Schottky diodes is enabled, and the parasitic capacitance and resistance as well as the physical size of the diode are minimized. A process for fabricating an integrated group III nitride structure comprising double-heterostructure field effect transistors (DHFETs) and Schottky diodes and the resulting structure are also disclosed.


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