The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8367517 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 05, 2013

Filed:

Jan. 21, 2011
Applicants:

Kazuya Hanaoka, Kanagawa, JP;

Hideki Tsuya, Kanagawa, JP;

Yoshihiro Komatsu, Kanagawa, JP;

Inventors:

Kazuya Hanaoka, Kanagawa, JP;

Hideki Tsuya, Kanagawa, JP;

Yoshihiro Komatsu, Kanagawa, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

An insulating layer is formed over a surface of a semiconductor wafer to be the bond substrate and irradiation with accelerated ions is performed, so that an embrittlement region is formed inside the wafer. Next, this semiconductor wafer and a base substrate such as a glass substrate or a semiconductor wafer are attached to each other. Then, the semiconductor wafer is divided at the embrittlement region by heat treatment, whereby an SOI substrate is manufactured in which a semiconductor layer is provided over the base substrate with the insulating layer interposed therebetween. Before this SOI substrate is manufactured, heat treatment is performed on the semiconductor wafer at 1100° C. or higher under a non-oxidizing atmosphere such as an argon gas atmosphere or a mixed atmosphere of an oxygen gas and a nitrogen gas.


Find Patent Forward Citations

Hanaoka, Kazuya. (2013). Method for manufacturing soi substrate (U.S. Patent No. 8367517). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8367517

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