The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2013

Filed:

May. 30, 2008
Applicants:

Jong Hyun Wang, Cheongju-si, KR;

Chae Kyu Jang, Icheon-si, KR;

SE Chun Park, Seoul, KR;

Inventors:

Jong Hyun Wang, Cheongju-si, KR;

Chae Kyu Jang, Icheon-si, KR;

Se Chun Park, Seoul, KR;

Assignee:

Hynix Semiconductor Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 29/44 (2006.01); G11C 29/56 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods for performing a fail test, block management, erase operations and program operations are used in a nonvolatile memory device having a block switch devoid of a fuse and a PMOS transistor. A method for performing a fail test in a nonvolatile memory device includes performing a fail test for a memory cell block; storing good block information in a block information store associated with the corresponding block when the memory cell block is a good block; and repeating the performing and storing steps for all memory cell blocks.


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