The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 29, 2013
Filed:
Mar. 06, 2008
Kenji Fukuda, Tokyo, JP;
Kenji Fukuda, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
An electronic component mounting configuration in which an electronic component chip having a plurality of protrusion-shaped electrodes distributed on its entire mounting surface is mounted through protrusion-shaped electrodes on a printed circuit board is provided which is capable of improving reliability of an electronic component by relieving thermal stress. The solder bumps are arranged so that intervals between solder bumps adjacent to one another become smaller from a central portion of a mounting surface of the electronic component chip toward the peripheral portion thereof. For example, an interval between the solder bump 'A' arranged in the central portion of the semiconductor chip and the solder bump 'B' arranged in an outer side thereof, adjacent to each other, is set to a pitch of P. An interval between the solder bump “B” and the solder bump “C” formed arranged in an outer side thereof, adjacent to each other, is set to a pitch of Pand an interval between the solder bump “C” and the solder bump “D” formed arranged in an outer side thereof, adjacent to each other, is set to a pitch of P(P>P>P).