The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8362530 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 29, 2013

Filed:

Dec. 09, 2010
Applicant:

Hidenobu Fukutome, Kyoto, JP;

Inventor:

Hidenobu Fukutome, Kyoto, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

An active region made of Si or SiGe is formed in a surface part of a substrate. A gate electrode is disposed over the active region. A gate insulating film is disposed between the gate electrode and the substrate. A source and a drain are formed in the surface part of the substrate on sides of the gate electrode. A surface of the active region under the gate electrode includes a slope surface being upward from a border of the active region toward an inner side of the active region. The slope surface has a crystal plane equivalent to (331).


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Fukutome, Hidenobu. (2013). Semiconductor device including misfet and its manufacture method (U.S. Patent No. 8362530). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8362530

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