The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 29, 2013

Filed:

Dec. 08, 2008
Applicants:

Osamu Matsushima, Kyoto, JP;

Kenichi Miyazaki, Kyoto, JP;

Inventors:

Osamu Matsushima, Kyoto, JP;

Kenichi Miyazaki, Kyoto, JP;

Assignee:

Rohm Co., Ltd., Kyoto-Fu, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 31/0232 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provision of a solid-state imaging device of a planarized structure with reduced dark currents, allowing for high sensitivities over a wide wavelength band ranging from visible wavelengths to near-infrared wavelengths, and a fabrication method of the same. There are steps of having circuitry () formed on a substrate (), forming a lower electrode layer () on the circuitry (), patterning the lower electrode layer () to separate pixel-wise into a set of segments, forming a compound-semiconductor thin film of chalcopyrite structure () over a whole area of element regions, applying a resist layer () on the compound-semiconductor thin film () to pixel-wise pattern in accordance with the lower electrode layer () as a base separated into the set of segments, applying an ion doping over a whole area of element regions, forming element separating regions () in the compound-semiconductor thin film (), removing the resist layer () for exposure of surfaces of a set of compound-semiconductor thin films () pixel-wise separated by the element separating regions (), and forming a transparent electrode layer () in a planarizing manner over a whole area of element regions.


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