The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 22, 2013
Filed:
May. 03, 2011
Xi Chen, Santa Clara, CA (US);
Jibin Han, Longmont, CO (US);
Paulo L. Dutra, San Jose, CA (US);
Thien Than, Thornton, CO (US);
Biping Wu, Longmont, CO (US);
Xi Chen, Santa Clara, CA (US);
Jibin Han, Longmont, CO (US);
Paulo L. Dutra, San Jose, CA (US);
Thien Than, Thornton, CO (US);
Biping Wu, Longmont, CO (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A method is provided for generation of a circuit design. A plurality of components, including at least a processor and a peripheral device, is instantiated in a circuit design. One or more parameterizable data bus interface blocks are automatically selected based on the master-slave relationships, requirements, and capabilities of the components. The one or more parameterizable data bus interface blocks are instantiated in the circuit design. In response to user input, values are assigned to one or more parameters of the processor. The plurality of components and data bus interface blocks are automatically parameterized by determining appropriate parameter values according to the parameters of the processor and capabilities and requirements of the components and data bus interface blocks.