The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8359490 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 22, 2013

Filed:

May. 02, 2012
Applicants:

Hideo Mochizuki, Kanagawa, JP;

Kazuaki Masuda, Kanagawa, JP;

Inventors:

Hideo Mochizuki, Kanagawa, JP;

Kazuaki Masuda, Kanagawa, JP;

Assignee:

Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory controller coupled to a DRAM includes a delay control section including a delay holding section, and coupled to the DRAM to output a delay set value to the DRAM and a delay adjustment section coupled to the DRAM to receive data from the DRAM, and to arrange a delay amount of the received data based on the delay set value. The delay set value is stored in both the delay holding section of the memory controller and the DRAM.


Find Patent Forward Citations

Mochizuki, Hideo. (2013). Memory controller, system including the controller, and memory delay amount control method (U.S. Patent No. 8359490). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8359490

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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