The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 22, 2013

Filed:

May. 28, 2009
Applicants:

Takashi Takemoto, Kokubunji, JP;

Hiroki Yamashita, Hachioji, JP;

Masayoshi Yagyu, Hanno, JP;

Inventors:

Takashi Takemoto, Kokubunji, JP;

Hiroki Yamashita, Hachioji, JP;

Masayoshi Yagyu, Hanno, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A low offset input circuit and a signal transmission system which can accommodate a high-speed interface and achieve reduction of an offset voltage are provided. An offset voltage compensating circuit blockhaving an input circuit blockincluding an input circuitand an adder-subtractor circuit block, switches, a detecting circuit block, and an adjusting and holding circuit blockis provided. To compensate for an offset voltage of the input circuit block, an offset voltage of the input circuit blockis detected at the detecting circuit blockby turning on the switches, and the detected offset voltage is held in the adjusting and holding circuit block, and negative feedback of the held offset voltage to the adder-subtractor circuit blockis performed. Thereby, signals Vop, Von having compensated offset voltages are outputted from the input circuit block


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