The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 15, 2013
Filed:
Nov. 25, 2010
Vinod K. Jain, Noida, IN;
Anand K. Sinha, Noida, IN;
Sanjay Kumar Wadhwa, Noida, IN;
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A start-up circuit for a PLL includes a phase-frequency detector (PFD), one or more logic gates, a flip-flop and a false detection circuit. The false detection circuit includes a set of series connected flip-flops. The PFD receives a reference signal and a feedback signal. The PFD compares the frequency of a reference signal with that of a feedback signal. If the frequency of the reference signal is greater than the frequency of the feedback signal then a start-up signal is generated and transmitted to the PLL. The PLL increases the frequency of the feedback signal until it is greater than the frequency of the reference signal. The generation of the start-up signal is halted when the frequency of the feedback signal is greater than the frequency of the reference signal.