The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 15, 2013
Filed:
Jul. 11, 2011
Benjamin A. Fox, Rochester, MN (US);
Nathaniel J. Gibbs, Iowa City, IA (US);
Andrew B. Maki, Rochester, MN (US);
David M. Onsongo, Austin, TX (US);
Trevor J. Timpane, Rochester, MN (US);
Benjamin A. Fox, Rochester, MN (US);
Nathaniel J. Gibbs, Iowa City, IA (US);
Andrew B. Maki, Rochester, MN (US);
David M. Onsongo, Austin, TX (US);
Trevor J. Timpane, Rochester, MN (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A structure and method for fabricating a light emitting diode and a light detecting diode on a silicon-on-insulator (SOI) wafer is provided. Specifically, the structure and method involves forming a light emitting diode and light detecting diode on the SOI wafer's backside and utilizing a deep trench formed in the wafer as an alignment marker. The alignment marker can be detected by x-ray diffraction, reflectivity, or diffraction grating techniques. Moreover, the alignment marker can be utilized to pattern openings and perform ion implantation to create p-n junctions for the light emitting diode and light detecting diode. By utilizing the SOI wafer's backside, the structure and method increases the number of light emitting diodes and light detecting diodes that can be formed on a SOI wafer, enables an increase in overall device density for an integrated circuit, and reduces attenuation of light signals being emitted and detected by the diodes.