The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2013

Filed:

Jun. 16, 2006
Applicant:

Peter H. Alfke, Los Altos Hills, CA (US);

Inventor:

Peter H. Alfke, Los Altos Hills, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A direct digital synthesis is provided with added circuitry to reduce jitter in an IC so that a programmable frequency output can be provided near the limits of the IC system clock with minimal jitter. The system derives the quotient Q as a remainder R in an accumulator at the instant of an overflow, divided by a programmable input N. The quotient Q is subjected to conversion logic that can be provided by a fast parallel to serial converter such as, for example a multi-gigabit transceiver (MGT) of an FPGA. As an alternative to an MGT, a series of delay devices such as found in a carry chain can be used if calibration is performed to assure the accuracy of delays.


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