The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2013

Filed:

Oct. 31, 2007
Applicants:

Richard K. Williams, Cupertino, CA (US);

Kevin D'angelo, Santa Clara, CA (US);

Charles Coles, Milpitas, CA (US);

Inventors:

Richard K. Williams, Cupertino, CA (US);

Kevin D'Angelo, Santa Clara, CA (US);

Charles Coles, Milpitas, CA (US);

Assignee:

Advanced Analogic Technologies, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/10 (2006.01); G05F 1/652 (2006.01); G05F 1/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A SEPIC converter with over-voltage protection includes a high-side inductor that connects a node Vto a node V. The node Vis connected, in turn to ground by a power MOSFET. The node Vis also connected to a node Vby a first capacitor. The node Vis connected to ground by a low-side inductor. A rectifier diode further connects the node Vand a node Vand an output capacitor is connected between the node Vand ground. A PWM control circuit is connected to drive the power MOSFET. An over-voltage protection MOSFET connects an input supply to the PWM control circuit and the node V. A comparator monitors the voltage of the input supply. If that voltage exceeds a predetermined value Vthe comparator output causes the over-voltage protection MOSFET to disconnect the node Vand the PWM control circuit from the input supply.


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