Reduced bottom roughness of stress buffering element of a semiconductor component

Abstract

The present invention relates to a stress buffering package () for a semiconductor component, with a semiconductor substrate (); an I/O pad (), electrically connected to the semiconductor substrate (); a stress buffering element () for absorbing stresses, electrically connected to the I/O pad (); an underbump metallization (), electrically connected to the stress buffering element (); a solder ball (), electrically connected to the underbump metallization (); a metal element () between the solder ball () and the semiconductor substrate (); a passivation layer (), which protects the semiconductor substrate () and the metal element () and which at least partially exposes the I/O pad (); characterized in that a roughness of an interface between the stress buffering element () and the passivation layer () is lower than a roughness of an interface between the metal element () and the passivation layer (). Furthermore the invention relates a method for manufacturing a stress buffering package () for a semiconductor component.