The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 08, 2013

Filed:

Nov. 22, 2010
Applicant:

Gabriele F. Formicone, Chandler, AZ (US);

Inventor:

Gabriele F. Formicone, Chandler, AZ (US);

Assignee:

Integra Technologies, Inc., El Segundo, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/0312 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed is an RF power FET or HEMT including an electrically-conductive substrate, a grounding metallization layer disposed on a bottom surface of the electrically-conductive substrate, an active area comprising at least one cell including source, gate and drain electrodes disposed over a top surface of the electrically-conductive substrate, and an electrically-conductive shallow trench electrically connecting the source electrode to the grounding metallization layer by way of the electrically-conductive substrate. This configuration results in the effective RF ground being very close to the active area of the FET in order to reduce parasitic source inductance and resistance. This results in potentially higher gain, higher saturation point, higher 3-order intercept, more efficient combining of the input RF signal, and more efficient extraction of the output RF signal. Additional benefits include reduced process complexity, such as, reduced need for plated air bridges, via holes formation and plating, front and back lithography alignment.


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