The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 01, 2013
Filed:
Sep. 29, 2010
Stephen Franck, Felton, CA (US);
Baker Scott, San Jose, CA (US);
George Maxim, Milpitas, CA (US);
Amalfi Semiconductor, Inc., Los Gatos, CA (US);
Abstract
A power amplifier using a drain (collector) power control loop in which the feedback signal is an estimated output power level computed with a linear summation of the output sensed voltage and current. Both RF and baseband voltage and current sensing are possible, and voltage-mode or current-mode signal processing are feasible. This control loop technique is applicable to any means of drain power control circuits such as: supply regulators, DC-DC converters and others. Voltage error amplifiers can be used in conjunction with voltage feedback network, while current error amplifiers can be used with current feedback networks. Regulator sharing between different bands may be used as an area and cost reduction solution. The linear voltage and current summation driven power control technique can be also applied to the gate (base) power control scheme. Similarly, voltage-mode and current-mode signal processing can be implemented.