The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2012
Filed:
Dec. 23, 2009
Richard Louis Arndt, Austin, TX (US);
Christopher Francois, Shakopee, MN (US);
Naresh Nayar, Rochester, MN (US);
Karthick Rajamani, Austin, TX (US);
Freeman Leigh Rawson, Iii, Austin, TX (US);
Randal Craig Swanberg, Round Rock, TX (US);
Richard Louis Arndt, Austin, TX (US);
Christopher Francois, Shakopee, MN (US);
Naresh Nayar, Rochester, MN (US);
Karthick Rajamani, Austin, TX (US);
Freeman Leigh Rawson, III, Austin, TX (US);
Randal Craig Swanberg, Round Rock, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A mechanism is provided in a logically partitioned data processing system for controlling depth and latency of exit of a virtual processor's idle state. A virtualization layer generates a cede latency setting information (CLSI) data. Responsive to booting a logical partition, the virtualization layer communicates the CLSI data to an operating system (OS) of the logical partition. The OS determines, based on the CLSI data, a particular idle state of a virtual processor under a control of the OS. Responsive to the OS calling the virtualization layer, the OS communicates the particular idle state of the virtual processor to the virtualization layer for assigning the particular idle state and wake-up characteristics to the virtual processor.