The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2012
Filed:
Jan. 30, 2009
Steven Huynh, Fremont, CA (US);
Matthew A. Grant, Palo Alto, CA (US);
Gary M. Hurtz, Pleasanton, CA (US);
David J. Kunst, Cupertino, CA (US);
Trey A. Roessig, Palo Alto, CA (US);
Steven Huynh, Fremont, CA (US);
Matthew A. Grant, Palo Alto, CA (US);
Gary M. Hurtz, Pleasanton, CA (US);
David J. Kunst, Cupertino, CA (US);
Trey A. Roessig, Palo Alto, CA (US);
Active-Semi, Inc., , VG;
Abstract
A programmable analog tile integrated circuit configuration tool communicates a power management control characteristic query soliciting control requirement information for a novel Power Management Integrated Circuit (PMIC) tile in a Multi-Tile Power Management Integrated Circuit (MTPMIC). The configuration tool receives a user response to the query indicating control requirements across a network. The PMIC tile includes configuration registers. Configuration information bit values stored in the configuration registers control the operational characteristics of the functional circuitry of the tile. The configuration registers of each novel PMIC tile are accessible at pre-defined addresses on a standardized bus of the MTPMIC. In response to the user response, the configuration tool generates appropriate tile configuration information for loading the configuration registers such that the PMIC tile within the MTPMIC is programmed to satisfy the user's control requirements.