The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2012
Filed:
Jul. 27, 2011
Alexander Korobkov, San Jose, CA (US);
Subramanian Venkateswaran, Santa Clara, CA (US);
Wai Chung W. AU, San Jose, CA (US);
Alexander Korobkov, San Jose, CA (US);
Subramanian Venkateswaran, Santa Clara, CA (US);
Wai Chung W. Au, San Jose, CA (US);
Oracle International Corporation, Redwood City, CA (US);
Abstract
Embodiments of the invention provide systems and methods for parallelizing simulation of circuit partitions. A circuit is divided into a number of partitions, for example, according to channel-connected regions. In some embodiments, the partitions are sequenced and assigned to multiple threads for parallel analysis. Iterative timing analysis (ITA), or some other form of analysis, is performed on the partitions over a series of integration time steps. Using the multiple threads, some partitions are solved at later integration time steps while the ITA continues toward relaxation convergence for a current integration time step.